Espressif Systems /ESP32-S3 /SENSITIVE /CORE_1_PIF_PMS_CONSTRAIN_6

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CORE_1_PIF_PMS_CONSTRAIN_6

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER

Description

Core1 access peripherals permission configuration register 6.

Fields

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BT

Core1 access bt permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_I2C_EXT0

Core1 access i2c_ext0 permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_UHCI0

Core1 access uhci0 permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLCHOST

Core1 access slchost permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_RMT

Core1 access rmt permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PCNT

Core1 access pcnt permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SLC

Core1 access slc permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_LEDC

Core1 access ledc permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BACKUP

Core1 access backup permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_BB

Core1 access bb permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_PWM0

Core1 access pwm0 permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP

Core1 access timergroup permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_TIMERGROUP1

Core1 access timergroup1 permission in world1.

CORE_1_PIF_PMS_CONSTRAIN_WORLD_1_SYSTIMER

Core1 access systimer permission in world1.

Links

() ()